DocumentCode
2350048
Title
A Note on the Performance of Sparse Matrix-vector Multiplication with Column Reordering
Author
Haque, Sardar Anisul ; Hossain, Shahadat
Author_Institution
Dept. of Math. & Comput. Sci., Univ. of Lethbridge, Lethbridge, AB, Canada
fYear
2009
fDate
2-4 April 2009
Firstpage
23
Lastpage
26
Abstract
We revisit ordering techniques as a preprocessing step for improving the performance of sparse matrix-vector multiplication (SpM x V) on modern hierarchical memory computers. In computing SpM x V the main purpose of ordering of columns (or rows) is to improve the performance by enhancing data reuse. We present a new ordering technique based on the binary reflected gray codes and experimentally evaluate and compare it with other column ordering techniques from the literature. The results from numerical experiments with very large test matrices clearly demonstrates the performance gains rendered by our proposed technique.
Keywords
Gray codes; cache storage; sparse matrices; binary reflected gray codes; column reordering; data reuse; modern hierarchical memory computers; ordering techniques; sparse matrix-vector multiplication; Bandwidth; Computer science; Data structures; Drives; Mathematics; Performance gain; Reflective binary codes; Sparse matrices; Testing; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Computing, Engineering and Information, 2009. ICC '09. International Conference on
Conference_Location
Fullerton, CA
Print_ISBN
978-0-7695-3538-8
Type
conf
DOI
10.1109/ICC.2009.40
Filename
5328973
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