• DocumentCode
    2350190
  • Title

    Performance of evaporated and plated bumps on organic substrates

  • Author

    Mistry, Addi ; Czarnowski, J. ; Beddingfield, Craig ; Tan, Qing ; Guajardo, James ; Rhyner, Ken ; Kleffner, Jim ; Scanlon, Tim ; Lozano, Jerry ; Wontor, Dave ; Scott, Kevin

  • Author_Institution
    Motorola Inc., Austin, TX, USA
  • fYear
    1998
  • fDate
    19-21 Oct 1998
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    Hand-held consumer electronic products require low cost, small substrates. To increase substrate utilization, applications are being shifted from standard wire bond BGA to CSP and DCA, reducing substrate usage by up to 55%. To increase silicon efficiency, products are moving from perimeter to area array. The key interconnect enabler for FC-PBGA, CSP, and DCA applications is “the bump”: evaporated technologies, C4 (controlled collapse chip connection) and E-3 (extended eutectic evaporated), and electroplated and electroless plated bumps are reviewed briefly in this paper. The performance of each of these bumps is considered from the mechanical integrity and reliability points of view. The mechanical integrity of all of these bumps are evaluated by measuring the tensile strengths and by investigating their failure modes. Also, factors affecting the reliability of the bumps, such as the size and shape of the passivation opening, the under-bump metallization (UBM) thickness, and the bump height are evaluated on the eutectic electroless plated bump structure. Thereafter, the performances of C4 versus E-3 and C4 versus electroplated bumps are discussed. C4, E-3 and electroplated bumps have been found to be comparable to each other in terms of performance
  • Keywords
    ball grid arrays; chip scale packaging; electroless deposition; electroplating; failure analysis; flip-chip devices; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; microassembling; passivation; soldering; tensile strength; C4 bumps; CSP; DCA; E-3 bumps; FC-PBGA; Si; area array packaging; bump height; controlled collapse chip connection; electroless plated bumps; electroplated bumps; eutectic electroless plated bump structure; evaporated bump technologies; evaporated bumps; extended eutectic evaporated bumps; failure modes; hand-held consumer electronic products; interconnect enabler; mechanical integrity; organic substrates; passivation opening; perimeter array packaging; plated bumps; reliability; reliability factors; silicon efficiency; substrate cost; substrate size; substrate usage; substrate utilization; tensile strength; under-bump metallization thickness; wire bond BGA; Bonding; Consumer electronics; Costs; Mechanical variables measurement; Metallization; Passivation; Semiconductor device measurement; Shape; Silicon; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT
  • Conference_Location
    Austin, TX
  • ISSN
    1089-8190
  • Print_ISBN
    0-7803-4523-1
  • Type

    conf

  • DOI
    10.1109/IEMT.1998.730929
  • Filename
    730929