DocumentCode
2355193
Title
Package model synthesis
Author
Young, Brian
Author_Institution
Texas Instruments, Austin, TX, USA
fYear
2003
fDate
27-29 Oct. 2003
Firstpage
173
Lastpage
176
Abstract
To address the need for package models in the earliest project stages before package layout has even begun, a package description language and a package model synthesizer have been developed and are described.
Keywords
ball grid arrays; electronic design automation; electronics packaging; flip-chip devices; visual databases; C code; design databases; dynamic memory allocation; flip-chip PBGA; general-purpose electromagnetic algorithms; model netlist; package description language; package layout; package model synthesizer; physical model; signal integrity; Bandwidth; Data mining; Databases; Electromagnetic forces; Electromagnetic modeling; Integrated circuit interconnections; Packaging; Page description languages; Signal design; Synthesizers;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2003
Conference_Location
Princeton, NJ, USA
Print_ISBN
0-7803-8128-9
Type
conf
DOI
10.1109/EPEP.2003.1250025
Filename
1250025
Link To Document