Automatic modification of sequential circuits for self-checking implementation

In this paper we present a tool for the automatic insertion of the modifications required to make a general sequential circuit self-checking with respect to possible transient faults. In particular, our tool modifies the internal structure of the sequential circuit and adds proper encoders/decoders and checkers. A VHDL description of the obtained self-checking system is generated, that can be given to the input of a conventional synthesis tool. As an example we consider the case of the synthesis tool available within the Xilinx FPGA design framework. However, our developed software may be easily adapted to operate on the preamble of any other commercial synthesis tool.