Physical insights on nanoscale FETs based on epitaxial graphene on SiC

Epitaxial graphene on SiC substrate is a promising channel material for FETs because it can possibly overcome two main problems of graphene-based devices: the fabrication process is suitable for large-volume manufacturing, and the material exhibits an appreciable semiconducting gap of 0.26 eV. We present an analytical model of a nanoscale FET based on epitaxial graphene on SiC, and assess the achievable performance in the case of fully ballistic transport. Our model also allows us to conduct an exploration of the design parameter space. We observe that the main aspect undermining the performance of graphene FETs on SiC is the still limited energy gap, that has two main consequences: on the one hand it allows band-to-band tunneling at the drain side when the device is in the off state, therefore limiting the achievable I_on/I_off ratio; on the other hand the injection of holes in the channel, when the device is biased in subthreshold, increases the channel quantum capacitance and can severely degrade the subthreshold slope. We show that an I_on/I_off ratio of 60 and a subthreshold slope of 150 mV/decade are obtained for a ballistic device without lateral confinement and for a supply voltage of 0.25 V. We also show that performance can be largely improved if accumulation of holes in the channel is inhibited or suppressed ( by allowing a limited degree of inelastic scattering) up to a very interesting I_on/I_off ratio close to 10⁴.