DocumentCode
2357711
Title
Improving simulation accuracy for SMT packages by incorporating trace level details in PCB thermal modeling
Author
Swaminathan, V. ; Venkatakrishnan, G. ; Tan, Whei Sheng ; Ooi, Wei Meng
Author_Institution
TCI, Delphi Automotive Syst. Pvt Ltd., Bangalore, India
fYear
2010
fDate
8-10 Dec. 2010
Firstpage
185
Lastpage
189
Abstract
The need for accurate trace level modeling is emphasized, by comparing simulated junction temperatures of a SMT package on a PCB under different combinations of trace layout. The results show that detail modeling of traces around the device has a significant impact on the predicted temperatures and over-simplified PCB models can cause unacceptable errors.
Keywords
surface mount technology; thermal management (packaging); PCB thermal modeling; SMT package; junction temperature; simulation accuracy; trace level detail;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference (EPTC), 2010 12th
Conference_Location
Singapore
Print_ISBN
978-1-4244-8560-4
Electronic_ISBN
978-1-4244-8561-1
Type
conf
DOI
10.1109/EPTC.2010.5702630
Filename
5702630
Link To Document