• DocumentCode
    2359985
  • Title

    Assembly of 3D probe array for wireless implantable neuroprobe microsystem

  • Author

    Aibin, Yu ; Ming-Yuan, Cheng ; Kwanling, Tan ; Daquan, Yu ; Giao, Teh Poh ; Ramana, M.B. ; Minkyu, Je

  • Author_Institution
    Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
  • fYear
    2010
  • fDate
    8-10 Dec. 2010
  • Firstpage
    721
  • Lastpage
    725
  • Abstract
    Assembly methods with specially designed Si interposer and Si platform are described for low profile 3D neural probe array assembly in this paper. In this method, in order to assemble the probe array with low profile and connect the probe with ASIC chips, an interposer is designed to connect the electrical pads on the sidewall of the probe and the electrical pads on the surface of the Application-specific integrated circuit (ASIC) chip. To hold the probe array and ASIC chip, a Si platform is designed with through Si slot for insertion of probe and cavity for holding the interposer. The electrical interconnections between the probe and the ASIC chip are formed by conventional flip chip bonding method. Therefore the throughput for the 3D probe array can be improved. Another advantage of the developed assembly method is that the backbone of the probe can be embedded inside the cavity of the Si platform, as a results, the profile of the probe array on top of the Si platform is controlled lower than 1 mm easily, which make sure it does not touch skull after implant into the brain.
  • Keywords
    application specific integrated circuits; assembling; biomedical electronics; elemental semiconductors; flip-chip devices; integrated circuit bonding; integrated circuit interconnections; micromechanical devices; probes; prosthetics; silicon; ASIC chips; Si; application-specific integrated circuit chip; electrical interconnections; electrical pads; flip chip bonding method; interposer; low profile 3D neural probe array assembly method; wireless implantable neuroprobe microsystem;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC), 2010 12th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4244-8560-4
  • Electronic_ISBN
    978-1-4244-8561-1
  • Type

    conf

  • DOI
    10.1109/EPTC.2010.5702732
  • Filename
    5702732