• DocumentCode
    2360847
  • Title

    FPGA Based Stereo Vision System to Display Disparity Map in Realtime

  • Author

    Takaya, Kunio ; Qian, Zheng

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Saskatchewan, Saskatoon, SK, Canada
  • fYear
    2012
  • fDate
    23-25 May 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Dense stereo disparity map displayed in real time as video is one form of 3D video that renders objects in the scene by the intensity modulation in terms of the distance to the objects. With two cameras whose the optical axes are parallel, the stereo disparity is calculated to find the range to the objects. Sophisticated matching algorithms are generally slow and difficult to apply parallelism to run in real time at a video rate. In order to realize a real time system, the window based stereo matching algorithm that searches the minimum of the sum of absolute differences along the raster scanlines was implemented in the Altera Cyclone II EP2C35F672C6 FPGA. The developed HDL code successfully achieved DDM dynamically displaying the measure of distance, dense disparity map in VGA format at 15 fps.
  • Keywords
    field programmable gate arrays; image sensors; real-time systems; stereo image processing; video signal processing; 3D video; Altera Cyclone II EP2C35F672C6 FPGA; FPGA based stereo vision system; VGA format; camera; dense stereo disparity map; display disparity map; intensity modulation; optical axes; realtime system; sophisticated matching algorithms; stereo disparity; Cameras; Field programmable gate arrays; Hardware; Heuristic algorithms; Real time systems; Stereo vision; Streaming media;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Science and Applications (ICISA), 2012 International Conference on
  • Conference_Location
    Suwon
  • Print_ISBN
    978-1-4673-1402-2
  • Type

    conf

  • DOI
    10.1109/ICISA.2012.6220958
  • Filename
    6220958