DocumentCode
2362820
Title
Reductions of self-reducible sets to depth-1 weighted threshold circuit classes, and sparse sets
Author
Agrawal, M. ; Arvind, V.
Author_Institution
Sch. of Math., SPIC Science Foundation, Madras, India
fYear
1995
fDate
19-22 Jun 1995
Firstpage
264
Lastpage
276
Abstract
Let LT1 denote the class of languages accepted by nonuniform families of polynomial size depth-1 circuits with a linear weighted threshold gate at the root. We show that disjunctive self-reducible bd-cylinders that many-one reduce to LT1 are in P. It follows that for C∈{NP, ModkP, PP, C=P}, if 𝒞 has a many-one hard problem in LT1 then 𝒞=P. As corollary, this result subsumes various collapse consequence results concerning reductions to sparse sets. We propose a technique by which some of these results for disjunctive self-reducible sets can be extended to Turing self-reducible sets. We show applications of this technique
Keywords
Turing machines; computational complexity; Turing self-reducible sets; depth-1 weighted threshold circuit classes; disjunctive self-reducible bd-cylinders; linear weighted threshold gate; nonuniform families of polynomial size depth-1 circuits; self-reducible sets; sparse sets; Circuits; Computer science; Geometry; Linear programming; Mathematics; Polynomials;
fLanguage
English
Publisher
ieee
Conference_Titel
Structure in Complexity Theory Conference, 1995., Proceedings of Tenth Annual IEEE
Conference_Location
Minneapolis, MN
ISSN
1063-6870
Print_ISBN
0-8186-7052-5
Type
conf
DOI
10.1109/SCT.1995.514865
Filename
514865
Link To Document