DocumentCode
2363524
Title
Modeling of nonvolatile gate-all-around charge-trapping SONOS memory cells
Author
Gnani, E. ; Reggiani, S. ; Gnudi, A. ; Baccarani, G. ; Fu, J. ; Singh, N. ; Lo, G.Q. ; Kwong, D.L.
Author_Institution
DEIS, Univ. of Bologna, Bologna, Italy
fYear
2009
fDate
14-18 Sept. 2009
Firstpage
280
Lastpage
283
Abstract
In this work we present an investigation on the program, retention and erase mechanisms of cylindrical gate-all-around charge-trapping memories. The numerical model accounts for tunnel injection of electrons and holes from the channel and the gate into the silicon nitride layer; for carrier transport, capture and emission in the nitride, and allows for both planar and cylindrical geometries. Simulations of the programming transient are validated against experimental data taken over an extended range of program voltages and times. The retention property in the programmed state is found to be a sensitive function of the trap energy in the nitride bandgap. Instead, retention in the erased state mainly depends on the ability of the gate oxide to withstand electron tunneling, and is thus a sensitive function of the gate voltage. The erasing process in the investigated cell is made much more complicated than programming and retention due to the interaction between hole generation mechanisms in the nanowire (mainly by impact ionization) and hole injection into the nitride layer.
Keywords
integrated circuit modelling; integrated memory circuits; random-access storage; carrier transport; cylindrical gate-all-around charge-trapping memories; electron tunneling; erase mechanism; erasing process; gate oxide; gate voltage; hole generation mechanisms; hole injection; nitride bandgap; nonvolatile gate-all-around charge-trapping SONOS memory cells; numerical model; programmed state; programming transient; retention mechanism; retention property; silicon nitride layer; trap energy; tunnel injection; Charge carrier processes; Electron emission; Electron traps; Geometry; Nonvolatile memory; Numerical models; Photonic band gap; SONOS devices; Silicon; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 2009. ESSDERC '09. Proceedings of the European
Conference_Location
Athens
ISSN
1930-8876
Print_ISBN
978-1-4244-4351-2
Electronic_ISBN
1930-8876
Type
conf
DOI
10.1109/ESSDERC.2009.5331609
Filename
5331609
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