DocumentCode
2367217
Title
Cellular automata based test structures with logic folding
Author
Sikdar, Biplab K. ; Das, Sukanta ; Roy, Samir ; Ganguly, Niloy ; Das, Debesh K.
Author_Institution
Comput. Sci. & Technol., Bengal Eng. & Sci. Univ., West Bengal, India
fYear
2005
fDate
3-7 Jan. 2005
Firstpage
71
Lastpage
74
Abstract
This work presents an efficient test solution for VLSI circuits. The test structure is designed with GF(2P) CA. The introduction to an innovative scheme of logic folding optimizes the cost of test logic that can not be feasible with the flattened structure of GF(2) CA/LFSR.
Keywords
Galois fields; VLSI; cellular automata; integrated circuit testing; logic testing; optimisation; VLSI circuits; cellular automata based test structures; logic folding; test logic cost optimization; Automatic testing; Built-in self-test; Circuit testing; Computer science; Design engineering; Logic circuits; Logic design; Logic testing; Polynomials; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2005. 18th International Conference on
ISSN
1063-9667
Print_ISBN
0-7695-2264-5
Type
conf
DOI
10.1109/ICVD.2005.63
Filename
1383256
Link To Document