6Å EOT Si0.45Ge0.55 pMOSFET with optimized reliability (VDD=1V): Meeting the NBTI lifetime target at ultra-thin EOT

Author

Franco, J. ; Kaczer, B. ; Eneman, G. ; Mitard, J. ; Stesmans, A. ; Afanas´ev, V. ; Kauerauf, T. ; Roussel, Ph J. ; Toledano-Luque, M. ; Cho, M. ; Degraeve, R. ; Grasser, T. ; Ragnarsson, L. -Å ; Witters, L. ; Tseng, J. ; Takeoka, S. ; Wang, W.E. ; Hoffman

Author_Institution

Imec, Leuven, Belgium

fYear

2010

fDate

6-8 Dec. 2010

Abstract

6Å EOT Si_0.45Ge_0.55 pFETs with 10 year lifetime at operating conditions (V_DD=1V) are demonstrated. Ultra-thin EOT is achieved by interfacial layer (IL) scavenging. Negative Bias Temperature Instability (NBTI) is alleviated using a high Ge fraction, a thick SiGe quantum well (QW) and a thin Si cap. Hot Carrier Injection (HCI) and Time Dependent Dielectric Breakdown (TDDB) are shown also to not constitute a showstopper for optimized SiGe devices.

Keywords

Ge-Si alloys; MOSFET; hot carriers; semiconductor device breakdown; semiconductor device reliability; semiconductor quantum wells; EOT; NBTI lifetime target; SiGe; equivalent oxide thickness; hot carrier injection; interfacial layer scavenging; negative bias temperature instability; optimized reliability; pMOSFET; size 6 angstrom; time dependent dielectric breakdown;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2010 IEEE International

Conference_Location

San Francisco, CA

ISSN

0163-1918

Print_ISBN

978-1-4424-7418-5

Electronic_ISBN

0163-1918

Type

conf

DOI

10.1109/IEDM.2010.5703292

Filename

5703292