Product drift from NBTI: Guardbanding, circuit and statistical effects

Circuits employing advanced performance and power management techniques (clock gating, half-cycle paths) are found to be much more sensitive to NBTI primarily due to differential and asymmetric aging, with a 1% transistor drift leading to as much as 3% circuit drift in some cases. For the first time, we report a monotonic reduction in variance of the log parameters (Ln(ΔF/F) and Ln(ΔI_D/I_D)) as a function of stress time. A stochastic guard banding model accounting for time-dependent variance, re-ordering effects and granularity of data is demonstrated.