DocumentCode
2368464
Title
A 10-bit 80-MSPS 2.5-V 27.65-mW 0.185-mm2 segmented current steering CMOS DAC
Author
Haider, Shahid ; Banerjee, Swapna ; Ghosh, Arindrajit ; Prasad, Ravi Sankar ; Chatterjee, Anirban ; Dey, Sanjoy Kumar
Author_Institution
IHP-Germany, Frankfurt, Germany
fYear
2005
fDate
3-7 Jan. 2005
Firstpage
319
Lastpage
322
Abstract
This paper presents a 10 bits 80 MSPS 2.5 V digital-to-analog converter (DAC) using 0.25 micrometer double poly four metal CMOS technology for mixed-signal applications. A segmented current steering architecture is used for this DAC. This architecture gives the most optimized results in terms of speed, resolution, area and power. The DAC can operate at a frequency of 80MHz and above. Total power dissipation is 27.6525 mW with 2.5 V power supply. It achieves differential nonlinearity and integral nonlinearity of ±0.55 LSB and ±0.4 LSB. It occupies an area of 0.185 mm2.
Keywords
CMOS analogue integrated circuits; digital-analogue conversion; low-power electronics; mixed analogue-digital integrated circuits; 0.25 micron; 10 bits; 2.5 V; 27.65 mW; MOS analog circuits; differential nonlinearity; digital-to-analog converter; double poly four metal CMOS technology; integral nonlinearity; low-power electronics; mixed analog-digital integrated circuits; mixed-signal applications; segmented current steering CMOS DAC; Analog circuits; CMOS technology; Consumer electronics; Decoding; Digital-analog conversion; Energy consumption; Frequency; Power dissipation; Power supplies; Switches; Digital to Analog Conversion; Low Power; MOS Analog Circuits; Mixed Analog -Digital Integrated Circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2005. 18th International Conference on
ISSN
1063-9667
Print_ISBN
0-7695-2264-5
Type
conf
DOI
10.1109/ICVD.2005.6
Filename
1383295
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