• DocumentCode
    2368640
  • Title

    Briefing a new approach to improve the EMI immunity of DSP systems

  • Author

    Vargas, Fabian ; Fagundes, Rubem D R ; Barros, Daniel, Jr. ; Brum, Diogo B.

  • Author_Institution
    Electr. Eng. Dept., Catholic Univ., Porto Alegre, Brazil
  • fYear
    2003
  • fDate
    16-19 Nov. 2003
  • Firstpage
    468
  • Lastpage
    471
  • Abstract
    Hereafter, we present an approach dealing to improve the reliability of digital signal processing (DSP) systems operating in real noisy (electromagnetic interference - EMI) environments. The approach is based on the coupling of two techniques: the "DSP-oriented signal integrity improvement" technique deals to increase the signal-to-noise ratio (SNR) and is essentially a modification of the classic Recovery Blocks Scheme. The second technique, named "SW-based fault handling" aims to detect in real-time data- and control-flow faults throughout modifications of the processor C-code. When compared to conventional approaches using Fast Fourier Transform (FIT) and Hamming Code, the primary benefit of such an approach is to improve system reliability by means of a considerably low complexity, reasonably low performance degradation and, when implemented in hardware, with reduced area overhead. Aiming to illustrate the proposed approach, we present a case study for a speech recognition system, which was partially implemented in a PC microcomputer and in a COTS microcontroller. This system was tested under a home-tailored EMI environment according to the International Standard Normative IEC 61.0004-29. The obtained results indicate that the proposed approach can effectively improve the reliability of DSP systems operating in real noise (EMI) environments.
  • Keywords
    digital signal processing chips; electromagnetic interference; error handling; hidden Markov models; integrated circuit reliability; microcontrollers; speech recognition equipment; COTS microcontroller; DSP systems; EMI immunity; HMM probability; control-flow faults; data-flow faults; low complexity; recovery blocks scheme; reduced area overhead; reliability; signal integrity improvement; signal-to-noise ratio; software based fault handling; speech recognition system; Degradation; Digital signal processing; Digital signal processors; Electromagnetic interference; Fast Fourier transforms; Fault detection; Hardware; Hidden Markov models; IEC standards; Integrated circuit reliability; Microcontrollers; Reliability; Signal to noise ratio; Working environment noise;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2003. ATS 2003. 12th Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-1951-2
  • Type

    conf

  • DOI
    10.1109/ATS.2003.1250858
  • Filename
    1250858