• DocumentCode
    2370968
  • Title

    Random telegraph noise in 45-nm CMOS: Analysis using an on-chip test and measurement system

  • Author

    Realov, Simeon ; Shepard, Kenneth L.

  • Author_Institution
    Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
  • fYear
    2010
  • fDate
    6-8 Dec. 2010
  • Abstract
    RTN measurements in 45-nm CMOS across device bias and geometry using an on-chip characterization system are reported. An automated methodology for extracting RTN levels, amplitude and dwell times is developed. Complex RTN magnitude is statistically modeled, and device size and bias parameter dependencies of the developed model are examined.
  • Keywords
    CMOS integrated circuits; telegraphy; CMOS; RTN measurements; bias parameter; device bias; device size; geometry; measurement system; on-chip characterization system; on-chip test; random telegraph noise; size 45 nm; statistical modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 2010 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0163-1918
  • Print_ISBN
    978-1-4424-7418-5
  • Electronic_ISBN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.2010.5703436
  • Filename
    5703436