Phase change memory line concept for embedded memory applications

Author

Attenborough, K. ; Hurkx, Godefridus Adrianus Maria ; Delhougne, R. ; Perez, J.M. ; Wang, M.T. ; Ong, T.C. ; Tran, Luan ; Roy, Didier ; Gravesteijn, D.J. ; van Duuren, M.J.

Author_Institution

NXP-TSMC Res. Centre, Leuven, Belgium

fYear

2010

fDate

6-8 Dec. 2010

Abstract

We report on successful array level integration of a Phase Change Random Access Memory (PCRAM) with a narrow line of doped-Sb₂Te phase change material, embedded in a standard 65nm CMOS process. Demonstrator cells can be reversibly reprogrammed between two well-defined resistance levels and correlate well with data achieved on megabit array level. The low process complexity, standard back-end temperature budget and ease of integration combined with the low voltage and current operation makes this line concept highly suitable for embedded PCRAM applications.

Keywords

CMOS integrated circuits; embedded systems; phase change memories; CMOS process; array level integration; embedded PCRAM application; embedded memory application; low process complexity; megabit array level; phase change material; phase change memory line concept; phase change random access memory; resistance level; standard back-end temperature budget;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2010 IEEE International

Conference_Location

San Francisco, CA

ISSN

0163-1918

Print_ISBN

978-1-4424-7418-5

Electronic_ISBN

0163-1918

Type

conf

DOI

10.1109/IEDM.2010.5703442

Filename

5703442