• DocumentCode
    2371833
  • Title

    FPGA implementation of low-frequency GPR signal algorithm using frequency stepped chirp signals in the time domain

  • Author

    Kyovtorov, V. ; Kabakchiev, C. ; Behar, V. ; Kuzmanov, G. ; Garvanov, I. ; Doukovska, L.

  • Author_Institution
    Inst. of Inf. Technol., BAS, Sofia
  • fYear
    2008
  • fDate
    21-23 May 2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper concerns the FPGA implementation of a time-domain stepped frequency method, which is suitable for ground penetrating radar implementation. It describes the block of the algorithm from implementation point of view. The conclusion gives information about the real-time constraints, and the device utilization for the particular reconfigurable processor.
  • Keywords
    ground penetrating radar; radar signal processing; FPGA implementation; field programmable gate arrays; frequency stepped chirp signal; ground penetrating radar; low-frequency GPR signal algorithm; reconfigurable processor; time domain stepped frequency method; Algorithm design and analysis; Chirp; Digital systems; Field programmable gate arrays; Frequency; Ground penetrating radar; Hardware; Narrowband; Signal processing algorithms; Time domain analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radar Symposium, 2008 International
  • Conference_Location
    Wroclaw
  • Print_ISBN
    978-83-7207-757-8
  • Type

    conf

  • DOI
    10.1109/IRS.2008.4585775
  • Filename
    4585775
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2371833