Design and Implementation of an 1-Octave 100nsec Compensated Delay in X-Band

Author

Askari, G.H. ; Miri, S.M. ; Ghasemi, K.H. ; Sadeghi, H. Mir Mohammad

Author_Institution

Inf. & Commun. Technol. Inst., Isfahan Univ. of Technol., Isfahan

fYear

2008

fDate

27-31 Oct. 2008

Firstpage

1169

Lastpage

1172

Abstract

The main problems to construct a wide band delay block with more than 10nsec delay are insertion loss and its high variation of in overall frequency band width. In this paper, design and implementation of a wideband delay circuit in X-band is presented. All important specifications such as insertion loss and flatness in frequency response and free of high order effects in time domain, has been solved in this project. The final experimental result is a delay block with an 100nsec delay, 0dB compensated insertion loss and 3dB of flatness in frequency bandwidth of 7-11 GHz and a very good time response without second and third order effects in time domain.

Keywords

delay circuits; integrated circuit design; 1-octave compensated delay; X-band; compensated insertion loss; delay block; frequency 7 GHz to 12.5 GHz; frequency band width; frequency bandwidth flatness; time 100 ns; time domain; wide band delay block; wideband delay circuit; Bandwidth; Coaxial cables; Delay effects; Delay lines; Frequency; Insertion loss; Microstrip; Radar applications; Superconducting transmission lines; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2008. EuMC 2008. 38th European

Conference_Location

Amsterdam

Print_ISBN

978-2-87487-006-4

Type

conf

DOI

10.1109/EUMC.2008.4751667

Filename

4751667