A set of benchmarks for modular testing of SOCs

Author

Marinissen, Erik Jan ; Iyengar, Vikram ; Chakrabarty, Krishnendu

Author_Institution

IC Design - Digital Design & Test, Philips Res. Labs., Eindhoven, Netherlands

fYear

2002

fDate

2002

Firstpage

519

Lastpage

528

Abstract

This paper presents the ITC´02 SOC test benchmarks. The purpose of this new benchmark set is to stimulate research into new methods and tools for modular testing of SOCs and to enable the objective comparison of such methods and tools with respect to effectiveness and efficiency. The paper defines the benchmark format and naming scheme, and presents the benchmark SOCs. In addition, it provides an overview of the research problems that can be addressed and evaluated by means of this benchmark set. These research problems include the design of optimized test access infrastructures and test schedules.

Keywords

automatic testing; circuit optimisation; integrated circuit testing; logic testing; performance evaluation; scheduling; system-on-chip; ITC´02 SOC test benchmarks; SOC modular testing benchmark set; SOC test automation; benchmark format/naming scheme; benchmark set research problems; modular testing methods/tools comparison; optimized test access infrastructures; system-on-chip; test schedule design; Application specific integrated circuits; Automatic testing; Benchmark testing; Circuit testing; Integrated circuit testing; Laboratories; Logic testing; Microelectronics; Rivers; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2002. Proceedings. International

ISSN

1089-3539

Print_ISBN

0-7803-7542-4

Type

conf

DOI

10.1109/TEST.2002.1041802

Filename

1041802