C-4/BGA comparison with other MLC single chip package alternatives

Author

Puttlitz, K.J. ; Shutler, William F.

Author_Institution

IBM Corp., East Fishkill, NY, USA

fYear

1994

fDate

1-4 May 1994

Firstpage

16

Lastpage

21

Abstract

Future applications will require higher I/O counts, more densification, lower cost and greater performance. This paper demonstrates why area-array based chip-to-substrate and substrate-to-card interconnections are strategic, particularly solder bump flip chips (SBFC or C-4) and solder grid arrays (SGA) respectively. That is, SBFC are capable of high pin counts coupled with high yields, performance and reliability. Moreover, recently introduced SGA interconnections, both ball and column, provide substantial benefits over standard pin grid array (PGA) packages. Also, SGA packages possess the highest density achievable at the card level when utilized in conjunction with SBFC-mounted die

Keywords

flip-chip devices; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; lead bonding; reflow soldering; C-4/BGA; I/O counts; MLC single chip package; SBFC-mounted die; SGA interconnections; area-array based chip-to-substrate interconnections; ball grid array; card level; cost; densification; pin counts; reliability; solder bump flip chips; solder grid arrays; substrate-to-card interconnections; yields; Application specific integrated circuits; Bonding; Costs; Electronics packaging; Flip chip; Lead; Microelectronics; Productivity; Stress; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 1994. Proceedings., 44th

Conference_Location

Washington, DC

Print_ISBN

0-7803-0914-6

Type

conf

DOI

10.1109/ECTC.1994.367658

Filename

367658