• DocumentCode
    2379615
  • Title

    Epitaxial Growth of Si/Si1-xGex Films on Corrugated Substrates for Improved pMOSFET Performance

  • Author

    Chopra, Saurabh ; Tran, Vinh ; Wood, Bingxi ; Ho, Byron ; Kim, Yihwan ; Chang, CP ; Kuppurao, Satheesh ; Liu, Tsu-Jae King

  • Author_Institution
    Appl. Mater. Inc., Santa Clara, CA, USA
  • fYear
    2012
  • fDate
    4-6 June 2012
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    The quasi-planar segmented-channel MOSFET (SegFET) design provides an evolutionary pathway for continued CMOS technology scaling [1], and can be fabricated using a conventional process flow starting with a corrugated substrate [2]. Fig. 1 shows a schematic plan view and cross-sectional views of the SegFET structure, whose channel region consists of parallel stripes of equal width (Wstripe) isolated by very shallow trench isolation (VSTI) dielectric material which extends below the source/ drain extensions but which can be much shallower than the STI dielectric material used to isolate transistors. The fringing electric fields through the VSTI regions provide for enhanced gate control of the channel potential, so that the SegFET exhibits better short channel behavior compared to the conventional MOSFET [2]. To achieve improved on-state performance, mobility enhancement techniques can be employed; for example, silicon-germanium (Si1-xGex) can be used as the channel material to enhance p-channel MOSFET performance [3-4]. This work investigates the selective epitaxial growth of Si and Si1-xGex layers to form corrugated-Si/Si1-xGex substrates for enhanced p-channel SegFET performance.
  • Keywords
    Ge-Si alloys; MOSFET; dielectric materials; electric fields; epitaxial growth; isolation technology; CMOS technology scaling; SegFET design; SegFET structure; Si-Si1-xGex; VSTI dielectric material; VSTI region; channel material; channel potential; channel region; corrugated substrate; electric field; epitaxial growth; evolutionary pathway; gate control; mobility enhancement; p-channel MOSFET; p-channel SegFET performance; pMOSFET performance; parallel stripes; process flow; quasiplanar segmented-channel; short channel behavior; source/ drain extension; very shallow trench isolation; Epitaxial growth; Fabrication; MOSFET circuits; Performance evaluation; Semiconductor device measurement; Silicon; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon-Germanium Technology and Device Meeting (ISTDM), 2012 International
  • Conference_Location
    Berkeley, CA
  • Print_ISBN
    978-1-4577-1864-9
  • Electronic_ISBN
    978-1-4577-1863-2
  • Type

    conf

  • DOI
    10.1109/ISTDM.2012.6222453
  • Filename
    6222453