Gate oxide integrity issue caused by wall-related process drift in plasma etching

Author

Xu, Songlin ; Lill, Thorsten

Author_Institution

Appl. Mater. Inc., Sunnyvale, CA, USA

fYear

2002

fDate

2002

Firstpage

56

Lastpage

59

Abstract

Different gate oxide loss in polysilicon gate etching has been found when the chamber wall condition changes, which might affect the consistency of device performance in IC production. In this work, the mechanism of wall-related process drift has been studied through etch performance evaluation and plasma diagnostics. The root cause of this issue has been identified as significant plasma property change due to the variation of surface recombination rate, of reactive free radicals with wall condition.

Keywords

elemental semiconductors; free radical reactions; plasma chemistry; plasma diagnostics; plasma-wall interactions; semiconductor-insulator boundaries; silicon; silicon compounds; sputter etching; IC production; Si; Si-SiO₂; chamber wall condition; etch performance evaluation; gate oxide integrity; gate oxide loss; plasma diagnostics; plasma etching; plasma property change; polysilicon gate etching; reactive free radicals; surface recombination rate; wall-related process drift; Cleaning; Etching; Performance loss; Plasma applications; Plasma diagnostics; Plasma materials processing; Plasma measurements; Plasma properties; Plasma sources; Production;

fLanguage

English

Publisher

ieee

Conference_Titel

Plasma- and Process-Induced Damage, 2002 7th International Symposium on

Print_ISBN

0-9651577-7-6

Type

conf

DOI

10.1109/PPID.2002.1042608

Filename

1042608