Plasma induced damage monitoring for HDP processes

Author

Beyer, A. ; Hausmann, A. ; Junack, M. ; Radecker, I. ; Ruf, A. ; Dirnecker, T.

Author_Institution

Infineon Technol., Dresden, Germany

fYear

2002

fDate

2002

Firstpage

84

Lastpage

87

Abstract

For a better comprehension of Plasma Induced Damage (PID) a Short Loop (SL) wafer concept was developed. These wafers can be used for the purpose of monitoring, process development, and tool characterization in different processes. The process of High Density Plasma (HDP) deposition for Inter Layer Dielectrics (ILD) has been investigated using the SL wafer concept. Monitoring data will be presented and it will be shown how irregularities in the process can generate PID. The process sequence can lead to a deposition at the edge of the chuck which is clearly identified as the reason for charging damage. It is shown that the damage risk can be minimized by PID monitoring using the SL wafer concept and by an extended process control.

Keywords

CMOS integrated circuits; integrated circuit manufacture; ion beam effects; plasma deposition; plasma materials processing; process monitoring; semiconductor growth; extended process control; high density plasma deposition; inter layer dielectrics; plasma induced damage monitoring; process development; short loop wafer concept; tool characterization; CMOS technology; Contacts; Integrated circuit technology; Leak detection; Monitoring; Plasma density; Plasma devices; Plasma immersion ion implantation; Stress; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Plasma- and Process-Induced Damage, 2002 7th International Symposium on

Print_ISBN

0-9651577-7-6

Type

conf

DOI

10.1109/PPID.2002.1042615

Filename

1042615