DocumentCode
2385701
Title
On-chip RF isolation techniques
Author
Blalack, Tallis ; Leclercq, Youri ; Yue, Patrick C.
Author_Institution
Cadence Design Syst. Inc., San Jose, CA, USA
fYear
2002
fDate
2002
Firstpage
205
Lastpage
211
Abstract
On-chip isolation is a function of many interdependent variables. This paper uses industry examples to highlight the isolation impacts of technology - substrate doping levels and triple wells, grounding/guard rings, shielding, capacitive decoupling, and package inductance.
Keywords
capacitance; chip scale packaging; earthing; inductance; integrated circuit manufacture; isolation technology; microwave integrated circuits; microwave isolators; reviews; semiconductor doping; shielding; capacitive decoupling; grounding; guard rings; industry examples; interdependent variables; on-chip RF isolation techniques; package inductance; review; shielding; substrate doping levels; triple wells; BiCMOS integrated circuits; CMOS process; Conductivity; Doping; Grounding; Impedance; Inductance; Isolation technology; Packaging; Radio frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting, 2002. Proceedings of the 2002
ISSN
1088-9299
Print_ISBN
0-7803-7561-0
Type
conf
DOI
10.1109/BIPOL.2002.1042919
Filename
1042919
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