A Multi-Layer Stackable Thin-Film Transistor (TFT) NAND-Type Flash Memory

Author

Lai, Erh-Kun ; Lue, Hang-Ting ; Hsiao, Yi-Hsuan ; Hsieh, Jung-Yu ; Lu, Chi-Pin ; Wang, Szu-Yu ; Yang, Ling-Wu ; Yang, Tahone ; Chen, Kuang-Chao ; Gong, Jeng ; Hsieh, Kuang-Yeu ; Liu, Rich ; Lu, Chih-Yuan

Author_Institution

Macronix Int. Co. Ltd., Hsinchu

fYear

2006

fDate

11-13 Dec. 2006

Firstpage

1

Lastpage

4

Abstract

A double-layer TFT NAND-type flash memory is demonstrated, ushering into the era of three-dimensional (3D) flash memory. A TFT device using bandgap engineered SONOS (BE-SONOS) (Lue et al., 2005, Lai et al., 2006) with fully-depleted (FD) poly silicon (60 nm) channel and tri-gate P⁺-poly gate is integrated into a NAND array. Small devices (L/W=0.2/0.09 mum) with excellent performance and reliability properties are achieved. The bottom layer shows no sign of reliability degradation compared to the top layer, indicating the potential for further multi-layer stacking. The present work illustrates the feasibility of 3D flash memory

Keywords

NAND circuits; flash memories; reliability; silicon; stacking; thin film transistors; 3D flash memory; NAND array; NAND-type flash memory; bandgap engineered SONOS; fully-depleted poly silicon; multilayer stackable thin-film transistor; multilayer stacking; reliability degradation; tri-gate P⁺-poly gate; Etching; Fabrication; Flash memory; Photonic band gap; Rapid thermal processing; Silicon; Stacking; Thin film transistors; Transconductance; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2006. IEDM '06. International

Conference_Location

San Francisco, CA

Print_ISBN

1-4244-0438-X

Electronic_ISBN

1-4244-0439-8

Type

conf

DOI

10.1109/IEDM.2006.346903

Filename

4154322