DocumentCode
2389092
Title
FPGA implementation of frame synchronization and symbol timing synchronization based on OFDM system for IEEE 802.11a
Author
Xie, Jinpeng ; Ding, Flngqiang ; Yang, Shouyi ; Qi, Lin
Author_Institution
Sch. of Inf. Eng., Zhengzhou Univ., Zhengzhou, China
fYear
2010
fDate
6-8 Dec. 2010
Firstpage
1
Lastpage
4
Abstract
The Orthogonal Frequency Division Multiplex (OFDM) has being used for many wireless and radio communications. The referenced examples are 802.11, 802.16, Digital Video Broadcasting (DVB) and so on. As its orthogonality, however, OFDM systems are vulnerable to synchronization errors. In this paper, It presents the implementation of a synchronization method including frame and symbol timing synchronization using Xilinx Field-Programmable Gate Array (FPGA) Spartan-3E device. The whole algorithms and simulations are under the Std IEEE 802.11a. Not only the result of the validation and implementation were reported in this paper but also the resources requirements in FPGA are shown with the mentioned method.
Keywords
OFDM modulation; digital video broadcasting; field programmable gate arrays; synchronisation; telecommunication standards; wireless LAN; IEEE 802.11a; digital video broadcasting; field programmable gate arrays; frame synchronization; orthogonal frequency division multiplexing; symbol timing synchronization; synchronization errors; Computational modeling; Educational institutions; Synchronization; 802.11a; FPGA; OFDM; synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Signal Processing and Communication Systems (ISPACS), 2010 International Symposium on
Conference_Location
Chengdu
Print_ISBN
978-1-4244-7369-4
Type
conf
DOI
10.1109/ISPACS.2010.5704644
Filename
5704644
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