Suppression of Anomalous Gate Edge Leakage Current by Control of Ni Silicidation Region using Si Ion Implantation Technique

Author

Yamaguchi, T. ; Kashihara, K. ; Okudaira, T. ; Tsutsumi, T. ; Maekawa, K. ; Kosugi, T. ; Murata, N. ; Tsuchimoto, J. ; Shiga, K. ; Asai, K. ; Yoneda, M.

Author_Institution

Production & Technol. Unit, Renesas Technol. Corp., Hyogo

fYear

2006

fDate

11-13 Dec. 2006

Firstpage

1

Lastpage

4

Abstract

It is reported for the first time that the anomalous gate edge leakage current in NMOSFETs is caused by the lateral growth of Ni silicide toward the channel region, and this lateral growth is successfully suppressed by the control of the Ni silicidation region using the Si ion implantation (Si I.I.) technique. As a result, the anomalous gate edge leakage current is successfully reduced, and the standby current and yield for 65nm-node SRAM are greatly improved. This novel technique has high potential for 45nm and 32nm CMOS technology

Keywords

CMOS integrated circuits; MOSFET; SRAM chips; ion implantation; leakage currents; nickel compounds; silicon; CMOS technology; NMOSFET; NiSi:Si; SRAM; anomalous gate edge leakage current; ion implantation; lateral growth; leakage current suppression; silicidation region; CMOS technology; Ion implantation; Leakage current; MOS devices; MOSFETs; Random access memory; Semiconductor films; Silicidation; Silicides; Thermal degradation;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2006. IEDM '06. International

Conference_Location

San Francisco, CA

Print_ISBN

1-4244-0439-8

Electronic_ISBN

1-4244-0439-8

Type

conf

DOI

10.1109/IEDM.2006.346916

Filename

4154351