• DocumentCode
    2390984
  • Title

    Design, mapping, and simulations of a 3G WCDMA/FDD base station using network on chip

  • Author

    Wiklund, Daniel ; Liu, Dake

  • Author_Institution
    Dept. of Electr. Eng., Linkoping Univ., Sweden
  • fYear
    2005
  • fDate
    20-24 July 2005
  • Firstpage
    252
  • Lastpage
    256
  • Abstract
    This paper presents a case study of a single-chip 3G WCDMA/FDD base station implementation based on a circuit-switched network on chip. As the amount of transistors on a chip continues to increase, so does the possibility to integrate more functionality onto every chip. By combining general-purpose and application-specific hardware, it is possible to integrate the complete baseband part of a 3G base station on a single chip. Such a single-chip base station has been modeled from a communication perspective without full implementations of the processing elements. The system has been scheduled and implemented as a traffic model for a network on chip simulator. Simulation results show perfect adherence to the schedule already at a network clock frequency of 75 MHz. The overall network usage is relatively low except for the area closest to the radio interfaces. This allows for other messages, e.g. control related, to be transported over the network during the gaps in the communication schedule.
  • Keywords
    3G mobile communication; circuit simulation; code division multiple access; switched networks; system-on-chip; 3G WCDMA/FDD base station; 3G base station; 75 MHz; application-specific hardware; circuit-switched network on chip; communication schedule; general-purpose hardware; network usage; radio interfaces; traffic model; wideband code division multiple access; Base stations; Baseband; Circuit simulation; Clocks; Communication system traffic control; Frequency; Hardware; Multiaccess communication; Network-on-a-chip; Traffic control; 3G; Network on chip; WCDMA; basestation; scheduling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on
  • Print_ISBN
    0-7695-2403-6
  • Type

    conf

  • DOI
    10.1109/IWSOC.2005.50
  • Filename
    1530952