Ultra High-speed Novel Bulk Thyristor-SRAM (BT-RAM) Cell with Selective Epitaxy Anode (SEA)

Author

Sugizaki, T. ; Nakamura, M. ; Yanagita, M. ; Honda, M. ; Shinohara, M. ; Ikuta, T. ; Ohchi, T. ; Kugimiya, K. ; Yamamoto, R. ; Kanda, S. ; Yamamura, I. ; Yagami, K. ; Oda, T.

Author_Institution

Sony Corp., Kanagawa

fYear

2006

fDate

11-13 Dec. 2006

Firstpage

1

Lastpage

4

Abstract

We developed novel SRAM cells using bulk thyristor-RAM (BT-RAM). BT-RAM, formed on bulk Si wafers, is low cost and has good compatibility with logic process flows. BT-RAM has excellent performance, with a 100-ps read/write, high I_on/I_off current ratio (> 10⁸), and low standby current (< 0.5 nA/cell). We can expect the ideal cell size to be as low as 30 F², one-fourth that of a conventional 6T-SRAM cell, by using selective epitaxy technique for anode regions (SEA). BT-RAM provides us with solutions to many inherent problems in 6T-SRAM in the 65-nm generation and beyond

Keywords

SRAM chips; doping profiles; thyristors; 100 ps; 6T-SRAM; BT-RAM cell; Si; logic process flows; selective epitaxy anode; ultra high-speed bulk thyristor-SRAM; Anodes; Costs; Doping profiles; Epitaxial growth; Interference; Logic devices; Noise reduction; Random access memory; Thyristors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2006. IEDM '06. International

Conference_Location

San Francisco, CA

Print_ISBN

1-4244-0438-X

Electronic_ISBN

1-4244-0439-8

Type

conf

DOI

10.1109/IEDM.2006.346984

Filename

4154419