DocumentCode
2395780
Title
FPGA Based Implementation of MSOVA for CDMA2000 Turbo Decoder
Author
Ismail, Ahmed M. ; Nafie, Mohamed H.
Author_Institution
Dept. of Electron. & Commun., Cairo Univ., Giza
fYear
2006
fDate
Dec. 2006
Firstpage
75
Lastpage
80
Abstract
Soft output Viterbi algorithm (SOVA) and max-log-maximum a posteriori (Max-Log-MAP) are used for turbo codes decoding. SOVA is considered a simple way of implementation with higher throughput in comparison to the Max-Log-MAP, while the later is still superior from decoding performance point of view. A modified SOVA (MSOVA) was theoretically proven to be equivalent to Max-Log-MAP. In this paper a HW implementation for CDMA2000 turbo decoder using MSOVA is presented. This implementation is based on the MSOVA, using Xilinx Virtex 2 pro FPGA. The implementation was shown to have higher throughput and lower latency than a commercial decoder
Keywords
3G mobile communication; Viterbi decoding; field programmable gate arrays; turbo codes; CDMA2000; FPGA; Xilinx Virtex 2; field programmable gate array; soft output Viterbi algorithm; turbo codes decoding; turbo decoder; Delay; Field programmable gate arrays; Iterative algorithms; Iterative decoding; Multiaccess communication; Real time systems; System-on-a-chip; Throughput; Turbo codes; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip for Real-Time Applications, The 6th International Workshop on
Conference_Location
Cairo
Print_ISBN
1-4244-0898-9
Type
conf
DOI
10.1109/IWSOC.2006.348268
Filename
4155264
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