CMOS four-valued logic circuits using charge control technique

Author

Watanabe, Toshio ; Matsumoto, Morio ; Li, Tekken ; Hirayama, Tetsurou

Author_Institution

Dept. of Electr. Eng., Toyo Univ., Saitama, Japan

fYear

1988

fDate

0-0 1988

Firstpage

90

Lastpage

97

Abstract

CMOS multiple-valued logic circuits using a charge-control method, which are suitable for use in synchronous sequential circuits together with the static-type MAX and MIN circuits, are presented. It is shown that circuits for conversion of logical values that are usually realized using complicated circuit configurations can be replaced by simple circuits with this approach. The technique of charge control that is presented here is similar to that used as the method of precharge in the usual dynamic-type MOS memory devices. The simulation results of such circuits using SPICE-2 are shown.<>

Keywords

CMOS integrated circuits; circuit layout CAD; integrated logic circuits; many-valued logics; CMOS four-valued logic circuits; MAX circuits; MIN circuits; SPICE-2; charge control technique; multiple-valued logic circuits; simulation results; synchronous sequential circuits; CMOS logic circuits; Circuit simulation; Clocks; Combinational circuits; Decoding; Logic circuits; MOSFETs; Pulse circuits; Sequential circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic, 1988., Proceedings of the Eighteenth International Symposium on

Conference_Location

Palma de Mallorca, Spain

Print_ISBN

0-8186-0859-5

Type

conf

DOI

10.1109/ISMVL.1988.5155

Filename

5155