• DocumentCode
    2398291
  • Title

    Logic Net Hardware Synthesis

  • Author

    Lukashenko, Olga

  • Author_Institution
    Kharkiv Nat. Univ. of Radio Electron., Kharkiv
  • fYear
    2006
  • fDate
    Feb. 28 2006-March 4 2006
  • Firstpage
    430
  • Lastpage
    431
  • Abstract
    This paper offers procedures for logic net synthesis. Also logic net design flow, oriented to hardware implementation, is considered. Hardware efficiency of logic net implementation, in comparison to software one, is shown.
  • Keywords
    field programmable gate arrays; logic design; network synthesis; FPGA; RTL synthesis; hardware efficiency; logic net design flow; logic net hardware synthesis; Algebra; Application software; Field programmable gate arrays; Hardware; Humans; Logic design; Logic devices; Logic functions; Network synthesis; Vectors; FPGA; RTL synthesis; design flow; hardware implementation; logic net; logic synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Modern Problems of Radio Engineering, Telecommunications, and Computer Science, 2006. TCSET 2006. International Conference
  • Conference_Location
    Lviv-Slavsko
  • Print_ISBN
    966-553-507-2
  • Type

    conf

  • DOI
    10.1109/TCSET.2006.4404572
  • Filename
    4404572
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2398291