The SBus: Sun´s high performance system bus for RISC workstations

An overview of the design of SBus, Sun´s SPARCstation 1 memory and input/output (I/O) expansion bus, is presented. In creating the SBus, the foremost goal was that overall system performance should not suffer because of the SBus design. The next most important goal was that I/O devices, including Ethernet and FDDI, be able to rely on the same high-performance, low-latency access to memory that is available to the central processor. Another goal was that it is possible to implement the interface between an I/O device and the SBus in a low-cost CMOS gate array, without having to use external buffers or drivers. A final goal was for the SBus to be the interface for I/O expansion. Raw SBus performance is provided by allowing a system clock of up to 25 MHz, represents a nice balance between ultimate performance and ease of system design and integration when boards are built by different manufacturers.<>