• DocumentCode
    2401156
  • Title

    A CMOS Low Distortion Fully Differential Power Amplifier With Double Nested Miller Compensation

  • Author

    Pernici, S. ; Nicollini, G. ; Castello, R.

  • fYear
    1992
  • fDate
    21-23 Sept. 1992
  • Firstpage
    191
  • Lastpage
    194
  • Abstract
    A four stages fully-differential amplifier that uses a double nested Miller compensated structure to lower harmonic distortion is presented. With a single 5V supply power dissipation is 10mW and THD is -83dB for a 6Vpp differential output signal at 10kHz and a load of 50Ω. With 8Ω load and 10kHz, 4Vpp output signal, THD is -68dB. The chip area is 1000mils2 in a 1.5μ n-well CMOS technology.
  • Keywords
    CMOS analogue integrated circuits; differential amplifiers; harmonic distortion; power amplifiers; CMOS low distortion fully differential power amplifier; double nested Miller compensation; frequency 10 kHz; lower harmonic distortion; power 10 mW; power dissipation; voltage 4 V; voltage 5 V; voltage 6 V; CMOS technology; Capacitors; Circuits; Differential amplifiers; Frequency; Harmonic distortion; Linearity; Microelectronics; Power dissipation; Power supplies;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1992. ESSCIRC '92. Eighteenth European
  • Conference_Location
    Copenhagen
  • Print_ISBN
    87-984232-0-7
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.1992.5468254
  • Filename
    5468254
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2401156