Progress in quantum functional devices to overcome barriers to ULSI scaling

Barriers to traditional scaling in silicon technology, primarily gate tunneling leakage current and drain-induced barrier lowering, will begin to emerge with the 1 Gb DRAM. Further scaling will involve performance fall-offs as critical dimensions are relaxed in order to reduce leakage currents. Compound semiconductor HFETs will suffer similar scaling penalties. Thin film SOI can extend silicon scaling by two or three generations. However, by the year 2000, a new technology will be necessary to continue the performance trend. That technology will likely utilize quantum effects to increase the functionality of individual electronic devices. The barriers to scaling MOSFETs and HFETs as well as examples of worldwide progress in developing quantum-based technology for future ULSI applications operating at room temperature are discussed.