• DocumentCode
    2404121
  • Title

    Efficient memory integrity verification and encryption for secure processors

  • Author

    Suh, G. Edward ; Clarke, Dwaine ; Gasend, B. ; Van Dijk, Marten ; Devadas, Srinivas

  • Author_Institution
    Comput. Sci. & Artificial Intelligence Lab., MIT, Cambridge, MA, USA
  • fYear
    2003
  • fDate
    3-5 Dec. 2003
  • Firstpage
    339
  • Lastpage
    350
  • Abstract
    Secure processors enable new sets of applications such as commercial grid computing, software copy-protection, and secure mobile agents by providing security from both physical and software attacks. This paper proposes new hardware mechanisms for memory integrity verification and encryption, which are two key primitives required in single-chip secure processors. The integrity verification mechanism offers significant performance advantages over existing ones when the checks are infrequent as in grid computing applications. The encryption mechanism improves the performance in all cases.
  • Keywords
    cache storage; computer crime; cryptography; formal verification; memory architecture; commercial grid computing; digital rights managment; encryption; memory integrity verification; secure mobile agents; single-chip secure processors; software attacks; software copy-protection; Application software; Artificial intelligence; Computer science; Computer security; Cryptography; Grid computing; Hardware; Mobile agents; Read-write memory; Tellurium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 2003. MICRO-36. Proceedings. 36th Annual IEEE/ACM International Symposium on
  • Print_ISBN
    0-7695-2043-X
  • Type

    conf

  • DOI
    10.1109/MICRO.2003.1253207
  • Filename
    1253207