Optimized polysilicon CMOS technology for gate array applications

Author

Manea, Elena ; Gingu, C. ; Cernica, Ileana ; Craciunoiu, Fl ; Dunare, S. ; Divan, Ralu ; Dunare, Camelia ; Beldiman, Iulia ; Modreanu, M. ; Dascalu, D.

Author_Institution

IMT-Bucharest, Romania

Volume

2

fYear

1998

fDate

6-10 Oct 1998

Firstpage

333

Abstract

The gate arrays option in manufacturing ASIC CMOS is conditioned by the possibility of satisfying small orders requirements of small- and medium-sized electronic equipment manufacturing companies, in a large variety of circuits. The authors present contributions in optimizing critical processes for an n-well CMOS polysilicon gate arrays technology. Technological achievements were proved by measurements on the test devices but mainly by array chip fabrication. There were manufactured chips for specialized circuits intended for telephone switching equipment

Keywords

CMOS logic circuits; application specific integrated circuits; elemental semiconductors; integrated circuit technology; logic arrays; silicon; ASIC manufacture; Si; chip fabrication; gate array; polysilicon CMOS technology; telephone switching equipment; CMOS process; CMOS technology; Costs; Electronic equipment manufacture; Etching; Integrated circuit technology; Inverters; Metallization; Oxidation; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference, 1998. CAS '98 Proceedings. 1998 International

Conference_Location

Sinaia

Print_ISBN

0-7803-4432-4

Type

conf

DOI

10.1109/SMICND.1998.733756

Filename

733756