A novel 1-V full-swing BiCMOS circuit using a positive feedback base-boost technique

Author

Kah, Lee Heng ; Seng, Yeo Gat ; Anh, Do Manh

Author_Institution

Hewlett Packard Pte Ltd., Singapore

Volume

2

fYear

1999

fDate

1999

Firstpage

605

Abstract

A novel 1-V full-swing BiCMOS logic circuit using a positive feedback base-boost technique for high-speed applications is described. The simulation results have shown that the new circuit outperforms the best non-complementary BiCMOS circuits reported so far in terms of speed, power consumption and chip area. Based on the 1 V/0.35 μm technology, the proposed circuit offers 49% delay reduction with negligible power dissipation over the CMOS at a load of 1 pF. The crossover capacitance of the proposed circuit is as low as 0.1 pF, and the experimental results have confirmed its circuit operation. Its gate delay per stage was measured to be 1.58 ns at 2 V/0.8 μm technology

Keywords

BiCMOS logic circuits; capacitance; circuit feedback; delays; high-speed integrated circuits; low-power electronics; 0.1 pF; 0.35 micron; 0.8 micron; 1 V; 1 pF; 1.58 ns; BiCMOS logic circuit; chip area; crossover capacitance; delay reduction; full-swing BiCMOS circuit; gate delay; high-speed applications; positive feedback base-boost technique; power consumption; power dissipation; speed; BiCMOS integrated circuits; CMOS technology; Capacitance; Degradation; Delay; Energy consumption; Feedback circuits; Logic circuits; Power dissipation; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1999. 42nd Midwest Symposium on

Conference_Location

Las Cruces, NM

Print_ISBN

0-7803-5491-5

Type

conf

DOI

10.1109/MWSCAS.1999.867711

Filename

867711