DocumentCode
2405832
Title
Using linear cellular automata with memory layer in BIST
Author
Dascalu, Monica ; Franti, Eduard ; Miloiu, Monica
Author_Institution
Dept. of Electron., Politehnica Univ., Bucharest, Romania
Volume
2
fYear
1998
fDate
6-10 Oct 1998
Firstpage
631
Abstract
Built-In Self Test is a basic requirement for high performances microelectronic products. The design of good BIST structures and schemes is a discipline by itself. This paper presents the features of cellular automata chat recommend their use in BIST, especially as test pattern generators. Different pseudo-random sequence generators with cellular automata are presented, together with their properties
Keywords
built-in self test; cellular automata; integrated circuit testing; BIST; built-in self test; linear cellular automata; memory layer; microelectronic product; pseudo-random sequence generator; test pattern generator; Automata; Automatic testing; Built-in self-test; Circuit testing; Electronic equipment testing; Logic testing; Microelectronics; Packaging; System testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Conference, 1998. CAS '98 Proceedings. 1998 International
Conference_Location
Sinaia
Print_ISBN
0-7803-4432-4
Type
conf
DOI
10.1109/SMICND.1998.733830
Filename
733830
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