DocumentCode
2406304
Title
Automatic model refinement for fast architecture exploration [SoC design]
Author
Peng, Junyu ; Abdi, Samar ; Gajski, Daniel
Author_Institution
Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
fYear
2002
fDate
2002
Firstpage
332
Lastpage
337
Abstract
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An architecture model is derived from the specification through a series of well defined steps in our design methodology. Traditional architecture exploration relies on manual refinement which is painfully time consuming and error prone. The automation of the refinement process provides a useful tool to the system designer to quickly evaluate several architectures in the design space and make the optimal choice. Experiments with the tool on a system design example show the robustness and usefulness of the refinement algorithm
Keywords
circuit CAD; computer architecture; integrated circuit design; integrated circuit modelling; logic CAD; SoC design; architecture exploration; architecture exploration decisions; architecture model; automatic model refinement; automatic refinement algorithms; design methodology; design space; design specification; manual refinement; refinement algorithm; refinement process automation; system design; Algorithm design and analysis; Analytical models; Computer architecture; Embedded computing; Iterative algorithms; Job shop scheduling; Power system modeling; Protocols; Refining; Software libraries;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.
Conference_Location
Bangalore
Print_ISBN
0-7695-1441-3
Type
conf
DOI
10.1109/ASPDAC.2002.994944
Filename
994944
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