Quick design of high-performance ΣΔ modulators using CAD tools: a 16.4 b 1.71 mW CMOS ΣΔM for 9.6 ksample/s A/D conversion

Author

Medeiro, F. ; Pérez-Verdú, B. ; de la Rosa, J.M. ; Rodriguez-Vazquez, Angel

Author_Institution

Inst. de Microelectronica, Seville Univ., Spain

fYear

1997

fDate

12-13 Sep 1997

Firstpage

22

Lastpage

27

Abstract

The possibility of using CAD tools to produce high-performance ΣΔ modulator (ΣΔM) ICs is illustrated in this paper through the design of a low-power 2nd-order ΣΔM. It is intended to be used in the front-end of a CMOS 0.7 μm energy metering ASIC. The fabricated prototype features 16.4-b dynamic range (DR) for 9.6-ksample/s output rate with a power budget of 1.71 mW. Such performance places this ΣΔM IC between those reported up to now with lowest value of the Power(W)/2^{resolution(bit)}×Output Rate(Hz) figure

Keywords

CMOS integrated circuits; circuit CAD; integrated circuit design; mixed analogue-digital integrated circuits; modulators; sigma-delta modulation; switched capacitor networks; 0.7 micron; 1.71 mW; A/D conversion; CAD tools; CMOS IC; energy metering ASIC; high-performance ΣΔ modulators; low-power 2nd-order modulator; quick design; Application specific integrated circuits; CADCAM; CMOS technology; Computer aided manufacturing; Delta modulation; Delta-sigma modulation; Design automation; Energy consumption; Prototypes; Quantization;

fLanguage

English

Publisher

ieee

Conference_Titel

Analog and Mixed IC Design, 1997. Proceedings., 1997 2nd IEEE-CAS Region 8 Workshop on

Conference_Location

Baveno

Print_ISBN

0-7803-4240-2

Type

conf

DOI

10.1109/AMICD.1997.637185

Filename

637185