DocumentCode
2408129
Title
Design of VLSI implemented signal processing systems based on signal flow graph analyses
Author
Wen, Kuei Ann ; Lee, Jau Yien ; Wang, Jhing Fa ; Wu, Chang Soon
Author_Institution
Inst. of Electr. & Comput. Eng., Nat. Cheng Kung Univ., Taiwan
fYear
1988
fDate
7-9 Jun 1988
Firstpage
1947
Abstract
An efficient design approach based on signal flow graph (SFG) analyses is introduced. A common set of VLSI structures has been derived for homogeneous and shuffle-exchange SFGs and are shown to be applicable to a general set of signal processing algorithms. The feasibility of this SFG-oriented design approach is demonstrated by an efficient implementation of the convolutional encoder/decoder, which is a significant achievement for coding system design
Keywords
VLSI; computerised signal processing; digital signal processing chips; directed graphs; encoding; signal processing equipment; VLSI; coding system; computerised signal processing; decoder; design; encoder; signal flow graph; Computer architecture; Decoding; Flow graphs; Process design; Routing; Signal analysis; Signal design; Signal processing; Signal processing algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo
Type
conf
DOI
10.1109/ISCAS.1988.15320
Filename
15320
Link To Document