Top-down eLearning tools for hardware logic design

New top-down eLearning tools for hardware logic design courses using the cellular methods are presented that enable students to keep focusing on their primary interests so that they can achieve complex logic circuits design successfully. In a modern logic design classroom, hardware description languages such as VerilogHDL are mostly used to describe circuits for FPGAs. The circuit in each module is described in VerilogHDL and the entire circuit is implemented by combination of designed modules. These HDL descriptions are wrapped in XML and enriched by a specially extended XML vocabulary, in order to share designed modules among learners on the Web. Although XML gives us a common and convenient Web framework, it becomes difficult to verify, validate, and maintain conformance among designed modules if the system becomes very large. To overcome this problem, we employed the cellular models that ensure the consistency among design modules and support a top-down design methodology. The proposed top-down eLearning tools can generate these circuit design data, distribute them to the learner, and manage the design database. The circuit design data wrapped in XML vocabulary are offered to the learner as a self-learning material of the courseware using the top-down (i.e. goal-oriented) method, according to the demand.