DocumentCode
2409896
Title
Study of materials and low power techniques for CNTFET
Author
Navin, Greeni ; Subbulakshmi, K. ; Jananee, R.V. ; Ravi, T.
Author_Institution
Sathyabama Univ., Chennai, India
fYear
2010
fDate
3-5 Dec. 2010
Firstpage
206
Lastpage
208
Abstract
Moore´s Law states that the number of transistors on a chip will double about every two years. As transistors are scaled down to nanometers, the theory and structure of nanometers devices such as carbon nanotubes field effect transistors (CNTFET) are being extensively studied. CNTFETs, offers high mobility due to ballistic transport, high carrier velocity for faster switching, reduced chip area and reduced number of interconnects. With the fundamental scaling limits are set by the minimum wavelength of light used in lithographic techniques, the only option is to enhance the performance of the CNTFET circuits This paper deals with the study of materials and their impact on the parameters and performance of CNTFET.
Keywords
ballistic transport; carbon nanotubes; carrier mobility; field effect transistors; integrated circuit interconnections; lithography; low-power electronics; nanoelectronics; CNTFET circuit; Moore´s law; ballistic transport; carbon nanotube field effect transistor; carrier mobility; interconnect; lithographic technique; low power technique; nanometer scale device; Buffer layers; CNTFETs; Capacitance; Gallium nitride; Logic gates; Silicon; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging Trends in Robotics and Communication Technologies (INTERACT), 2010 International Conference on
Conference_Location
Chennai
Print_ISBN
978-1-4244-9004-2
Type
conf
DOI
10.1109/INTERACT.2010.5706227
Filename
5706227
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