Delay defect diagnosis based upon statistical timing models - the first step [logic testing]

This paper defines a new diagnosis problem for diagnosing delay defects based upon statistical timing models. We illustrate the differences between delay defect diagnosis and traditional logic defect diagnosis. We propose different diagnosis algorithms, and evaluate their performance via statistical defect injection and statistical delay fault simulation. With a statistical timing analysis framework developed in the past, we demonstrate the new concepts in delay defect diagnosis, and discuss experimental results based upon benchmark circuits.