DocumentCode
2410797
Title
Real-time classification based on color and texture attributes on an FPGA-based architecture
Author
Ibarra-Manzano, Mario-Alberto ; Devy, Michel ; Boizard, Jean-Louis
Author_Institution
LAAS, CNRS, Toulouse, France
fYear
2010
fDate
26-28 Oct. 2010
Firstpage
250
Lastpage
257
Abstract
The design and the implementation of algorithms on FPGA-based architectures, is a complex task, above all for image processing. Many vision applications (video monitoring, obstacle detection from a vehicle) require real time performance. This paper analyzes only a classical function involved in these applications: pixel characterization by an attribute vector, and pixel classification as belonging or not to an interest class. Typical attributes are color and texture. Color is described by the chrominance given by the a and b coordinates in the CIE-Lab color space. Texture is only computed from the L* coordinate, describing the local intensity variations in a neighborhood of every pixel. AdaBoost has been selected in order to learn how to classify every pixel from its attribute vector. From a learning data base, it is learnt off line how to select and combine a given number of weak classifiers; then, the classifier parameters are loaded on an FPGA-based kit. This paper proposes different architectures and presents some results obtained from images acquired from a robot, in order to classify a pixel as Ground or Obstacle.
Keywords
field programmable gate arrays; image classification; image colour analysis; image texture; visual databases; AdaBoost; CIE-Lab color space; FPGA-based architecture; color attribute; field programmable gate arrays; image processing; learning data base; pixel characterization; pixel classification; real-time classification; texture attribute; Cameras; Classification algorithms; Computer architecture; Hardware; Image color analysis; Pixel; Training; Field programmable gate arrays; Image classification; Image color analysis; Image texture analysis; Real time systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Architectures for Signal and Image Processing (DASIP), 2010 Conference on
Conference_Location
Edinburgh
Print_ISBN
978-1-4244-8734-9
Electronic_ISBN
978-1-4244-8733-2
Type
conf
DOI
10.1109/DASIP.2010.5706272
Filename
5706272
Link To Document