• DocumentCode
    2410861
  • Title

    Single event effects testing of a PLL and LVDS in a RadHard-by-design 0.25-micron ASIC

  • Author

    Hartwell, Mary ; Hafer, Craig ; Milliken, Peter ; Farris, Teresa

  • Author_Institution
    Aeroflex Colorado Springs Inc., Colorado Springs, CO, USA
  • fYear
    2005
  • fDate
    11-15 July 2005
  • Firstpage
    98
  • Lastpage
    101
  • Abstract
    SEE testing performed on PLL and LVDS circuits showed both are immune to SEL to a LET of 108 MeV-cm2/mg. Temporary phase shifts and frequency changes caused by SET in the PLL are investigated.
  • Keywords
    CMOS integrated circuits; application specific integrated circuits; driver circuits; integrated circuit testing; low-power electronics; phase locked loops; radiation effects; 0.25 micron; ASIC RadHard-by-design; LVDS circuits; PLL circuits; frequency change; low voltage differential signal drivers; phase locked loops; phase shifts; single event effects testing; single event latch up; Application specific integrated circuits; Circuit testing; Integrated circuit technology; Libraries; Performance evaluation; Phase locked loops; Radiation hardening; Space technology; Springs; Technology management;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radiation Effects Data Workshop, 2005. IEEE
  • Print_ISBN
    0-7803-9367-8
  • Type

    conf

  • DOI
    10.1109/REDW.2005.1532673
  • Filename
    1532673
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2410861