• DocumentCode
    2411910
  • Title

    Generalized data transformations for enhancing cache behavior

  • Author

    De La Luz, V. ; Kandemir, M. ; Kadayif, I. ; Sezer, U.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
  • fYear
    2003
  • fDate
    2003
  • Firstpage
    906
  • Lastpage
    911
  • Abstract
    The performance gap between processors and off-chip memories has widened in the last years and is expected to widen even more. Today, it is widely accepted that caches improve significantly the performance of programs, since most of the programs exhibit temporal and/or spatial locality in their memory reference patterns. However conflict misses can be a major obstacle preventing an application from utilizing the data cache effectively. While array padding can reduce conflict misses it can also increase the data space requirements significantly. In this paper, we present a compiler-based data transformation strategy, called the "generalized data transformations," for reducing inter-array conflict misses in embedded applications. We present the theory behind the generalized data transformations and discuss how they can be integrated with compiler-based loop transformations. Our experimental results demonstrate that the generalized data transformations are very effective in improving data cache behavior of embedded applications.
  • Keywords
    cache storage; embedded systems; microprocessor chips; program compilers; array padding; cache memory; compiler loop transformation; conflict miss; embedded system; generalized data transformation; microprocessor chip; Costs; Electric breakdown; Embedded system; Engineering profession; Performance evaluation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2003
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1870-2
  • Type

    conf

  • DOI
    10.1109/DATE.2003.1253721
  • Filename
    1253721