A Delta-Sigma Modulator with a Widely Programmable Center Frequency and 82-dB Peak SNDR

A. 4-bit fourth-order delta-sigma modulator with a widely programmable center frequency is presented. Novel methods for quantizing and implementing the digitally programmable modulator coefficients enable performance comparable to state-of-the-art discrete-time fixed-frequency modulators at any center frequency from dc to 0.31 fs in steps of 0.0052/s. The 0.18-mum 1.8-V CMOS prototype consumes 115 mW at a sampling frequency of 40 MHz. The peak SNDR and SNR over a 310-kHz bandwidth are 82 dB and 86 dB respectively.